AI Hardware Design for Edge Devices
Bachelor’s Thesis / Master’s Thesis / Student Research Project
Abstract
UltraTrail is an AI hardware accelerator for near-sensor signal processing on edge devices. Its scalable hardware architecture allows a fast specialization to various application domains (e.g., automotive, medical, robotics). The accelerator is written in the hardware description language (HDL) SystemVerilog and has been implemented as both FPGA and ASIC. The hardware is accompanied by a software stack based on the deep learning compiler TVM that provides a deployment solution to map AI workloads to the accelerator.
Possible thesis topics are ranging from software solutions to hardware extensions for the AI accelerator.
References
- Paper: “UltraTrail: A Configurable Ultra-Low Power TC-ResNet AI Accelerator for Efficient Keyword Spotting”
- Paper: “Hardware Accelerator and Neural Network Co-Optimization for Ultra-Low-Power Audio Processing Devices”
- Paper: “Compiler-aware AI Hardware Design for Edge Devices”
- TVM
- SystemVerilog
Requirements
- Python
- Linux and Git
- SystemVerilog (recommended)
- Understanding of deep neural networks
- Understanding of computer architectures
- Successfully atteded the lecture “Grundlagen der Rechnerarchitektur” (recommended)
- Successfully atteded the lecture “Digital Design and Synthesis of Embedded Systems” (recommended)
- Successfully atteded the lecture “Efficient Machine Learning in Hardware” (recommended)